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sym_process Class Reference

In VHDL (as in Verilog), processes are strange things. More...

#include <dsym.h>

Inheritance diagram for sym_process:

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Collaboration diagram for sym_process:

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List of all members.

Public Member Functions

 sym_process (STRING n)
 sym_process ()
const uint get_sy_kind (void)

Public Attributes

LIST< sym_ident * > active_list

Detailed Description

In VHDL (as in Verilog), processes are strange things.

A process exists in its parent scope (a component or module) and it may have local variables and functions (e.g., it has a local symbol table). In this sense it is similar to a subprogram. However, unlike a subprogram a process does not have to have a name (although it may have a name associated with it for readability). So a process is not a symbol and can't be looked up in the symbol table.

For simplicities sake the process class is an alias of the sym_scope class, which provides a symbol table and a parent scope pointer.

A process is allocated via the local symbol table, but it is not entered in the symbol table. This is done so that there is a uniform method for allocating all symbol derived objects.

Definition at line 360 of file dsym.h.

Constructor & Destructor Documentation

sym_process::sym_process STRING  n  )  [inline]

Definition at line 365 of file dsym.h.

00365                            : sym_scope( n )
00366     {
00367     }

sym_process::sym_process  )  [inline]

Definition at line 368 of file dsym.h.

00369     {
00370     }

Member Function Documentation

const uint sym_process::get_sy_kind void   )  [inline, virtual]

Reimplemented from sym.

Definition at line 372 of file dsym.h.

References sy_process, and uint.

00372 { return sy_process; }

Member Data Documentation

LIST<sym_ident *> sym_process::active_list

Definition at line 362 of file dsym.h.

The documentation for this class was generated from the following file:
Generated on Wed Mar 31 21:16:11 2004 for Data Structures for a VHDL Compiler by doxygen 1.3.3