big_block_alloc | Support for the allocation of large memory blocks |
big_block_pool | An implementation of pooled memory allocation that makes use of the large memory block allocation class, big_block_alloc |
block_pool | An abstract base class for pooled memory allocation |
block_pool::block_chain_struct | |
const_agg | An aggragate constant |
const_range_signed | |
const_range_unsigned | |
const_real | |
FIFO_LIST< T > | This is a generic list type for a list that has both a head and a tail pointer (note the the LIST template only has a head pointer) |
FIFO_LIST< T >::LIST_TYPE | |
hash_services | This class provides low level support functions (e.g., hash value calculation) for the hash table element classes |
Hat< T > | This class implements a dynamicly growable array |
LIST< T > | This is a generic list type |
LIST< T >::LIST_TYPE | |
mem_pool< pool_type, max_handle > | This is a template class that implements arrays of memory pools |
node | Base class for the node type, which is the building block for the IR trees |
node_const | |
node_sym | |
node_type | |
option_flags | Maintains a bit-vector of option flags |
pool | This object is used to allocate a single memory pool |
sparse_array< T > | Template class for a sparse array of fixed size (e.g., it does not grow) |
src_ref | |
stack< stack_type, stack_max > | A stack template |
STRING | Packages a character string which has been allocated in a hash table |
strtable | This class implements a string table |
strtable::chain_elem | |
sym | Memory Allocation |
sym_component | A component is a bound entity architecture pair |
sym_const | Class to represent named constants and enumerations |
sym_ident | Class for variable identifiers |
sym_process | In VHDL (as in Verilog), processes are strange things |
sym_scope | This class is used for a named item that has scope information (for example, a procedure or a function) |
sym_scoped | This is a derived symbol class for named items that exist in a scope |
sym_subprog | This class represents VHDL procedures and functions |
sym_type | Derived symbol class for named types |
symtable | This class implements a symbol table for the VHDL compiler |
symtable::chain_elem | Class for the hash collision chains |
type | Represent VHDL types |
type_array | VHDL uses the concept of "array of type" |
type_file | |
type_range | Range types are limited to a complete range that can fit in 32-bits |
type_real | |
type_record | Record elements are ordered the way they appear in the record |
type_time | Special type for time |
typetable | Named types are represented by the sym_type class |
vhdl_const | Base class for VHDL constants |